Senior PCIe Design Engineer 資深PCIe設計工程師 - TrustTeks Ltd.|


2m+ TWD Annually

Required skills
  • SystemVerilog
  • ,
  • Verilog
  • ,
  • RTL
  • ,
  • FPGA

Job description

Responsible for PCIe Controller design, integration and simulation. 

Debug PCIe-related issue in ASIC or FPGA. 

Work with HW and FW team closely for the product development. 


Master's degree in electrical or electronics engineering. 

At least 3 years (preferred) experiences in RTL design and verification. 

Design experience in High Speed IO Controllers like PCIe or SATA. 

Good ability to integrate Phy IP. 

Familiar with FPGA and silicon debug. 

Good communication skill and team working spirit.

TrustTeks Ltd.


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