Tensorcom, a pioneer in developing innovative semiconductors for high-speed millimeter wave, ultra-low power, wireless communication chipsets, is looking for a candidate who is interested in working on complex, low power, ASIC designs for our next generation WiGig/IEEE 802.11ad compliant SoCs. The interested candidate will participate in a range of ASIC development activities such as defining the SoC architecture, the development of RTL code, the taping-out of the chip, and the evaluation of chip performance.
In addition to excellent technical skills, good English communication skills are required.
The interested candidate will be responsible for:
The interested candidate shall have demonstrable experience in:
· ASIC flow activities such as:
o Using front-end ASIC tools to perform simulations, lint/CDC, synthesis, formal verification, static timing, and power analysis
o Using Verilog and/or System Verilog proficiently
· Processor Subsystem:
o Understanding of ARM/RISC-V processor, memory, bus fabric, and interface IPs
o Hardware/Software interfacing
o Processor subsystems bring up
· Verification activities such as:
o Developing a testbench and test cases
o Emulating an ASIC on an FPGA development platform
· SoC system architecture and common peripheral interfaces such as SPI, I2C, UART, GPIO, and JTAG
Previous working experience on WLAN SoCs, Ethernet NICs, or Storage SoCs is desirable.
EDUCATION / MAJOR
■ BS ■ MS ■ PhD
Electrical or Computer Engineering, Communications Engineering, or similar applicable technical degrees.
Tensorcom is a leading provider of ultra-low power WiGig/60GHz technologies for markets as diverse as 60GHz solutions to high-speed and low latency wireless applications.